PLL synthesizer design

“ Control by design ”

Synthesizers are often designed by trial and error using 'rules of thumb'. Analytical design methods are now presented in a variety of documents and web based tools. These simplify the design process by enabling accurate simulation however real performance is often below simulated or desired results.

PLL operation

Phase locked loops operate as closed loop control systems. Typically simulation provides a design then measurements of spectrum peaking, phase noise profile, lock time and perceived stability are used to provide performance data. An incorrect phase margin, or a noisy element within the loop can remain undetected and in turn may cause problems with adjacent channel selectivity, adjacent channel power, or EVM.

Open loop measured

The phase margin and loop bandwidth relate to the open loop system which is used for simulation and is not normally measured. At Telestrian, the open loop system is simulated in Microwave Office™ and then measured showing the actual open loop gain, phase response and phase margin stability factor.

This enables a far greater insight into system performance. The open loop response is obtained by extracting the measurement from the system while the loop is in closed loop conditions by using the Agilent 89441A VSA.

Phase noise

Phase noise is again simulated using Microwave Office™. This enables optimization and EVM analysis to be simulated alongside phase noise profiles in real time. The models for both active and passive loops allow noise analysis of each of the individual noise sources in the systems, allowing rapid simulation of topology changes. Measurement of individual system blocks is often made, to obtain the closest possible simulation of the real system.

Phase noise is measured by the Agilent E5501B phase noise test system. The dynamic range available by using this system is greater than using other phase noise measurement techniques, which means problems with the PLL will be seen that can be missed using conventional spectrum analyzers. Frequency offsets of up to 100 MHz can be measured of RF sources up to 6 GHz using the HP8665B signal generator.

Lock time

The system's time to achieve phase or frequency lock is measured by a FSIQ or Agilent 89441A VSA. This parameter is largely dependant upon the loop bandwidth, however it is affected by the phase margin.